BayesFT: Bayesian Optimization for Fault Tolerant Neural Network Architecture
Published in DAC 2021 (Design Automation Conference)
We propose BayesFT, a Bayesian optimization framework for designing fault-tolerant neural network architectures. Our approach efficiently searches the architecture space to find models that maintain performance under hardware faults, achieving state-of-the-art results on fault-tolerant neural network design.
Recommended citation: N. Ye*, J. Mei*, Z. Fang, Y. Zhang, Z. Zhang, H. Wu, X. Liang. "BayesFT: Bayesian Optimization for Fault Tolerant Neural Network Architecture." DAC 2021.